Virtual Memory Mapping Work
RS Memory Configuration
Each Array = 16MB Each Bank = 8 arrays = 128 Mb Each DRAM = 8 banks = 1Gb Each Rank = 8 DRAMS = 8 Gb = 1 GB Each DIMM = 2 ranks = 16 Gb = 2 GB Bank Page Size = 1024 * 8 = 1 KB Rank Page Size = 8 KB Logical DIMM Page Size = 16 KB Logival DIMM contains 2 ranks Each rank = 8 banks * 16K rows per bank * 16 bytes per col
128 KB spacing will hit the same bank (non interleaved)!!!
x8 DRAM, 1 Gb 128 MB 8 banks 128 Mb = 16MB
Problem
NB_MC_PAGE_CONFLICT
NB_MC_PAGE_CONFLICT: Memory controller page access event - Page conflict
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NB_MC_PAGE_HIT
NB_MC_PAGE_HIT: Memory controller page access event - Page hit
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NB_MC_PAGE_MISS
NB_MC_PAGE_MISS: Memory controller page access event - Page miss
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DC_MISS
DC_MISS: Data Cache Miss
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PAPI_L1_DCM
PAPI_L1_DCM Level 1 data cache misses
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PAPI_TLB_DM
PAPI_TLB_DM Data translation lookaside buffer misses
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